Patent · US Active

Method for configuring an interface unit of a computer system

US10055363B2 · kind B2 · utility

0Cited by
5References
16Claims
0Family size

Assignee

Inventors

Key dates

Filing dateMay 11, 2016
Grant dateAug 21, 2018
Priority date
Expiry dateSep 7, 2036

Classification

  • Technology area (CPC G)Physics
  • CPC primaryG06F13/385
  • WIPO fieldComputer technology
  • WIPO sectorElectrical engineering

Abstract

A method for configuring an interface unit of a computer system with a first processor and a second processor stored in the interface unit. A data link is set up between the first processor and the second processor. A peripheral of the computer system is configured to store input data in an input data channel and to read output data from an output data channel, and the second processor is configured to read the input data from the input data channel and to store output data in the output data channel. A sequence of processor commands for the second processor is created such that a number of subsequences is created.

Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.