Constructing an in-memory representation of a graph
US10055509B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Apr 7, 2015 |
| Grant date | Aug 21, 2018 |
| Priority date | — |
| Expiry date | Jun 16, 2036 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F2201/80
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
Techniques for efficiently loading graph data into memory are provided. A plurality of node ID lists are retrieved from storage. Each node ID list is ordered based on one or more order criteria, such as node ID, and is read into memory. A new list of node IDs is created in memory and is initially empty. From among the plurality of node ID lists, a particular node ID is selected based on the one or more order criteria, removed from the node ID list where the particular node ID originates, and added to the new list. This process of selecting, removing, and adding continues until no more than one node ID list exists, other than the new list. In this way, the retrieval of the plurality of node ID lists from storage may be performed in parallel while the selecting and adding are performed sequentially.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.