Thin film transistor array substrate having black matrix formed in non-display zone and common electrode formed in display zone
US10056414B2 · kind B2 · utility
1Cited by
7References
8Claims
0Family size
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Key dates
| Filing date | Apr 24, 2013 |
| Grant date | Aug 21, 2018 |
| Priority date | — |
| Expiry date | Jan 21, 2034 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG09G3/36
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
A thin film transistor array substrate, a manufacturing method thereof and a display device are provided. The array substrate includes a substrate and a plurality of pixel units arranged on the substrate, each of which includes a display zone and a non-display zone including a thin film transistor and a black matrix that are provided on the substrate, wherein the black matrix is disposed between the substrate and the thin film transistor.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.