Apparatus and method for low latency, reconfigurable and picosecond resolution time controller
US10056974B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Dec 5, 2016 |
| Grant date | Aug 21, 2018 |
| Priority date | — |
| Expiry date | Dec 5, 2036 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG04F10/04
- WIPO fieldMeasurement
- WIPO sectorInstruments
Abstract
A reconfigurable and timely accurate method of generating, with a low latency, an output signal in response to multiple input signals, wherein said input signals occur at independent times, and wherein the occurrence of several input signals according to predetermined pattern is interpreted as a Super Event and wherein a detected Super Event triggers the production of a specific output signal heralding this Super Event, characterized in that said method comprises a first step of time acquisition of the occurrence of said input signals, a second step of adaptation of the acquisition data flow to the clock of the reconfigurable processing unit, a third step of determining the occurrence of a Super Event by comparing the events pattern to the super event definition, a fourth step identifying the Super Event and generating at least one event/signal corresponding to at least one trigger signal, a fifth step of adaptation of the generation data flow to the asynchronous generation device, a sixth step of applying a predefined delay for the issue of the at least one trigger signal, and an seventh step of outputting at least one output signal representing a trigger signal and sending it to …
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.