Method of producing an opening with smooth vertical sidewall in a semiconductor substrate
US10062610B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Oct 15, 2015 |
| Grant date | Aug 28, 2018 |
| Priority date | — |
| Expiry date | Oct 15, 2035 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH01L23/481
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
An opening (17) is etched from a main surface (10) of a substrate (1) of semiconductor material by deep reactive ion etching comprising a plurality of cycles, each of the cycles including a deposition of a passivation in the opening and an application of an etchant. An additional etching is performed between two consecutive cycles by an application of a further etchant that is different from the etchant. The passivation layer (9) is thus etched above a sidewall (7) of the opening to remove undesired protrusions.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.