TFT array substrate and manufacturing method thereof
US10062715B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Oct 10, 2016 |
| Grant date | Aug 28, 2018 |
| Priority date | — |
| Expiry date | Dec 11, 2036 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10D8/60
- WIPO fieldAudio-visual technology
- WIPO sectorElectrical engineering
Abstract
A TFT array substrate and its manufacturing method are disclosed. The TFT array substrate includes a substrate having a display area and a non-display area, and at least a Schottky diode on the non-display area. The Schottky diode includes an anode layer and a cathode layer on the substrate, a gate insulation layer on the substrate covering the anode and cathode layers, a first gate on the gate insulation layer covering portions of the anode and cathode layers, an inter-layer insulation layer on the gate insulation layer covering the first gate and having a number of vias exposing the anode and cathode layers, respectively, and a first electrode and a second electrode in the vias on the inter-layer insulation layer connecting the anode and cathode layers, respectively. The present disclosure achieves simplified manufacturing process and reduced cost by forming the Schottky diode simultaneously when the TFT is formed.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.