Leakage reduction circuit
US10063156B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Mar 27, 2014 |
| Grant date | Aug 28, 2018 |
| Priority date | — |
| Expiry date | Aug 27, 2034 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH02M1/123
- WIPO fieldElectrical machinery, apparatus, energy
- WIPO sectorElectrical engineering
Abstract
A leakage reduction circuit is described herein that is configured to reduce high voltage leakage that may occur in electrical power step-down scenarios. The leakage reduction circuit, for instance, may be employed in a power adapter for a client device, such as a mobile computing device. For example, a power adapter may include a high voltage alternating current (AC) input, and circuitry for converting the AC input into lower voltage direct current (DC) for output to a client device. Implementations of the disclosed leakage reduction circuit include an arrangement of capacitors that provides a noise return path (e.g., for common mode noise) in a power adapter, while reducing high voltage leakage that may occur from a high voltage AC input to a lower voltage DC output of the power adapter.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.