Protection of an integrated circuit
US10063239B2 · kind B2 · utility
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20Claims
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Key dates
| Filing date | Jun 19, 2017 |
| Grant date | Aug 28, 2018 |
| Priority date | — |
| Expiry date | Jun 19, 2037 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH04L2209/12
- WIPO fieldBasic communication processes
- WIPO sectorElectrical engineering
Abstract
An integrated circuit protection device, including: groups of radiation detection elements distributed in a matrix array; logic gates combining outputs of the detection elements in rows and in columns, each output of a detection element being connected to a gate combining a row and to a gate combining a column; and a circuit for interpreting signals supplied by said logic gates and including an event counter and a delay element.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.