Stochastic computation using deterministic bit streams
US10063255B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Jun 9, 2017 |
| Grant date | Aug 28, 2018 |
| Priority date | — |
| Expiry date | Jun 9, 2037 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH04B1/16
- WIPO fieldTelecommunications
- WIPO sectorElectrical engineering
Abstract
In some examples, a device includes an integrated circuit comprising a computational unit configured to process at least two input bit streams that each include a sequential set of data bits or two or more sets of data bits in parallel that is deterministically encoded to represent numerical values based on a probability that any data bit in the bit stream is high. In some examples, the computational unit includes a convolver configured to generate pair-wise bit combinations of the data bits of the input bit streams. In some examples, e computational unit further includes a stochastic computational unit configured to perform a computational operation on the pair-wise bit combinations and produce an output bit stream having a set of data bits indicating a result of the computational operation based on a probability that any data bit in the set of data bits of the output bit stream is high.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.