Systems and methods for tracking changes to and identifying layers of integrated circuit devices
US10068046B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Dec 21, 2015 |
| Grant date | Sep 4, 2018 |
| Priority date | — |
| Expiry date | Jul 6, 2036 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH01L2223/54453
- WIPO fieldOptics
- WIPO sectorInstruments
Abstract
Systems and methods are provided that may be implemented to identify and track layer changes of an integrated circuit (IC) device, e.g., during any one of circuit design, pattern generation, device fabrication and/or chip failure analysis processes. Multiple revisions and variants of different IC layers may be identified and tracked using a tracking system and standardized labeling scheme that employs a combination of identifier characters and identifier structures that may be further implemented using revision layer identification parameterized cells (layerID PCells and BooleanID PCells) that include such identifier characters and/or structures The disclosed tracking systems may be further implemented in an automated manner and/or in a manner that allows programming of various parts/aspects and layerID PCells and BooleanID PCells of the tracking system.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.