Laminated ceramic electronic component and method for manufacturing same
US10068710B2 · kind B2 · utility
3Cited by
1References
5Claims
0Family size
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Key dates
| Filing date | Jul 7, 2016 |
| Grant date | Sep 4, 2018 |
| Priority date | — |
| Expiry date | Jul 7, 2036 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH01G4/12
- WIPO fieldElectrical machinery, apparatus, energy
- WIPO sectorElectrical engineering
Abstract
A laminated ceramic electronic component that includes a laminate having a plurality of dielectric layers and a plurality of internal electrode layers laminated together. External electrodes having underlying electrode layers and plating layers are formed on both end surfaces of the laminate. When a cross-section including the underlying electrode layers is observed, the underlying electrode layers contain a plurality of Cu crystals and glass, and an average value of lengths of demarcation lines of the Cu crystals having different crystal orientations is 3 μm or less.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.