Semiconductor device
US10068819B2 · kind B2 · utility
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9Claims
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Key dates
| Filing date | Feb 13, 2017 |
| Grant date | Sep 4, 2018 |
| Priority date | — |
| Expiry date | Feb 13, 2037 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH02M7/003
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
A relay substrate in which a circuit pattern and an external electrode are integrated on a insulating plate is used in the semiconductor device. Such configuration makes it possible to reduce a resistance in a current path while preventing the problems occurring when the external electrode is soldered on the semiconductor chip.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.