Semiconductor package, method of manufacturing the same, and electronic device module
US10068855B2 · kind B2 · utility
1Cited by
9References
11Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | May 18, 2017 |
| Grant date | Sep 4, 2018 |
| Priority date | — |
| Expiry date | May 18, 2037 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH05K3/4644
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
A semiconductor package includes a frame including a through-hole, an electronic component disposed in the through-hole, a redistribution portion disposed below the frame and the electronic component, a metal layer disposed on an inner surface of the frame, and a conductive layer disposed between the metal layer and the electronic component, and covering the frame and the electronic component.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.