Method and system for testing circuit
US10073506B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Sep 29, 2015 |
| Grant date | Sep 11, 2018 |
| Priority date | — |
| Expiry date | Mar 23, 2036 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG01R19/16552
- WIPO fieldMeasurement
- WIPO sectorInstruments
Abstract
The present disclosure generally relates to a test method and system thereof. The test method comprises: outputting a test control signal to a test power supply of the circuit under test so as to adjust an input signal of the circuit under test so that a gain range of the circuit under test in an abnormal operating state is the same as that of the circuit under test in a normal operating state when the circuit under test enters into the abnormal operating state. The present disclosure may meet requirements for equipment test without sacrificing the efficiency of circuits in normal operating state or adding complexity circuit.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.