Memory device and data reading method thereof
US10074436B1 · kind B1 · utility
3Cited by
1References
18Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Jun 13, 2017 |
| Grant date | Sep 11, 2018 |
| Priority date | — |
| Expiry date | Jun 13, 2037 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG11C29/50012
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A memory device and a data reading method are provided. A dummy circuit performs a read operation in synchronism with a data access circuit according to an address signal, so as to estimate time points at which the data access circuit completes each of operating procedures, and enable the data access circuit to execute a next operating procedure when completing an operating procedure.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.