Multilayer capacitor with via electrodes interconnecting internal electrodes and board having the same
US10076036B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | May 10, 2017 |
| Grant date | Sep 11, 2018 |
| Priority date | — |
| Expiry date | May 10, 2037 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH05K2201/10015
- WIPO fieldElectrical machinery, apparatus, energy
- WIPO sectorElectrical engineering
Abstract
A multilayer capacitor includes a capacitor body including dielectric layers and a plurality of first and second internal electrodes alternately disposed with one of the dielectric layers interposed between each pair of adjacent first and second internal electrodes. First and second via electrodes penetrate through the plurality of second internal electrodes to thereby be exposed to a first surface of the capacitor body, and are disposed to be spaced apart from each other. First and second external electrodes are disposed on two side surfaces of the capacitor body and connected to opposing ends of the first internal electrodes, respectively. Third and fourth external electrodes are disposed on the first surface of the capacitor body to be spaced apart from each other, and are connected to end portions of the first and second via electrodes, respectively.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.