Semiconductor device and method of fabricating the same
US10079186B2 · kind B2 · utility
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3References
19Claims
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Key dates
| Filing date | Sep 23, 2016 |
| Grant date | Sep 18, 2018 |
| Priority date | — |
| Expiry date | Sep 23, 2036 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10D84/013
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
A method of fabricating a semiconductor device includes forming first and second fin patterns in an active region and in a measurement region of a substrate, respectively, the measurement region being different from the active region, forming first and second gate electrodes to cross the first and second fin patterns, respectively, and measuring a contact potential difference (Vcpd) of the second gate electrode to determine a threshold voltage of the first gate electrode based on the measured contact potential difference (Vcpd).
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.