Metal-insulator-metal capacitor analog memory unit cell
US10079234B1 · kind B1 · utility
2Cited by
3References
11Claims
0Family size
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Key dates
| Filing date | Jun 28, 2017 |
| Grant date | Sep 18, 2018 |
| Priority date | — |
| Expiry date | Jun 28, 2037 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10D86/215
Abstract
A memory device including a plurality of memory unit cells arranged in a crossbar configuration for a neural network is provided. Each of the memory unit cells includes a readout transistor, a charging transistor, a discharging transistor, and a metal-insulator-metal (MIM) capacitor connected to one of source/drain regions of each of the charging transistor and the discharging transistor and a functional gate of the readout transistor for storing analog information.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.