Switched multiplexer with flat group delay and channelized limiting
US10079414B2 · kind B2 · utility
151Cited by
1References
20Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Mar 17, 2016 |
| Grant date | Sep 18, 2018 |
| Priority date | — |
| Expiry date | Aug 19, 2036 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH03H7/46
- WIPO fieldTelecommunications
- WIPO sectorElectrical engineering
Abstract
Systems and method are provided for a switching circuit that enables attenuation of high power signals in relatively small band(s) without attenuating information in other bands. Embodiments of the present disclosure provide switching circuits with intrinsically switched filters that enable channelized limiting without affecting adjacent channels. Further, embodiments of the present disclosure provide a unique filter coupling topology that enables filters to be switched on or off without changing the input impedance of the filters.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.