Patent · US Active

Programming interface operations in a port in communication with a driver for reinitialization of storage controller elements

US10083144B2 · kind B2 · utility

2Cited by
1References
15Claims
0Family size

Assignee

Inventors

Key dates

Filing dateSep 30, 2015
Grant dateSep 25, 2018
Priority date
Expiry dateMay 20, 2036

Classification

  • Technology area (CPC G)Physics
  • CPC primaryG06F13/4027
  • WIPO fieldComputer technology
  • WIPO sectorElectrical engineering

Abstract

An embedded port of a host bus adapter of a storage controller receives, from a driver of the host bus adapter, a first set of commands to quiesce I/O operations in the embedded port for a first period, wherein hardware resets of buses and other logic to which the embedded port is connected are performed in the first period of quiescing of I/O operations. One or more commands are received to resume selected I/O operations in the embedded port. A second set of commands is received to quiesce I/O operations for a second period. A command is received to allow normal I/O operations, subsequent to the driver being reinitialized during the second period of quiescing of I/O operations.

Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.