Patent · US Active

Packaging process of electronic component

US10083925B2 · kind B2 · utility

0Cited by

1References

9Claims

0Family size

Assignee

Delta Electronics Int'l (Singapore) Pte Ltd · SG

Inventors

Qin Cai · Clyde Hill, US
Da-Jung Chen · Taoyuan, TW

Key dates

Filing date	Dec 8, 2017
Grant date	Sep 25, 2018
Priority date	—
Expiry date	Dec 8, 2037

Classification

Technology area (CPC H)Electricity
CPC primaryH01L2924/19105
WIPO fieldSemiconductors
WIPO sectorElectrical engineering

Abstract

A packaging process of an electronic component includes the following steps. Firstly, a semi-package unit is provided. The semi-package unit includes a first insulation layer and an electronic component. The electronic component is partially embedded within the first insulation layer. The electronic component includes at least one conducting terminal. Then, a metal layer is formed over the surface of the semi-package unit and a part of the metal layer is removed, so that a metal mask is formed on the surface of the semi-package unit and the at least one conducting terminals is exposed. Then, a metal re-distribution layer is formed on the metal mask and the at least one conducting terminal. Then, a part of the metal re-distribution layer and a part of the metal mask are removed, so that at least one contact pad corresponding to the at least one conducting terminal is produced.

Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.