Fan-out semiconductor package
US10083929B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Aug 1, 2017 |
| Grant date | Sep 25, 2018 |
| Priority date | — |
| Expiry date | Aug 1, 2037 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH01L2924/3511
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
A fan-out semiconductor package includes: a first connection member having a through-hole; a semiconductor chip disposed in the through-hole; an encapsulant encapsulating at least portions of the first connection member and the semiconductor chip; and a second connection member disposed on the first connection member and the semiconductor chip. The first connection member and the second connection member include, respectively, redistribution layers electrically connected to the connection pads of the semiconductor chip, the second connection member includes a coil pattern layer electrically connected to the connection pads of the semiconductor chip, and at least one of the first connection member and the second connection member includes a dummy pattern layer.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.