Semiconductor device
US10083957B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Sep 8, 2017 |
| Grant date | Sep 25, 2018 |
| Priority date | — |
| Expiry date | Sep 8, 2037 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10D84/811
Abstract
According to one embodiment, a semiconductor device includes a first electrode, first regions, second regions, an eighth semiconductor region, a ninth semiconductor region of the second conductivity type, a tenth semiconductor region, second electrodes, and a third electrode. Each first region includes a first semiconductor region, a second semiconductor region, a third semiconductor region, a fourth semiconductor region, and a gate electrode. The first regions and the second regions alternate in the second direction. Each of the second regions includes a fifth semiconductor region, a sixth semiconductor region, and a seventh semiconductor region. The eighth semiconductor region is provided between the first semiconductor regions and between the fifth semiconductor regions. The eighth semiconductor region is electrically connected to the first semiconductor regions. The third electrode is provided on the tenth semiconductor region with a first insulating layer interposed. The third electrode is electrically connected to the gate electrodes.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.