Clock data recovery with non-uniform clock tracking
US10084621B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Feb 1, 2017 |
| Grant date | Sep 25, 2018 |
| Priority date | — |
| Expiry date | Feb 1, 2037 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH04L2027/0069
- WIPO fieldDigital communication
- WIPO sectorElectrical engineering
Abstract
Systems and methods for adjusting a phase step size of a clock data recover (CDR) circuit are described according to aspects of the present disclosure. In certain aspects, a method for adjusting a phase step size of a CDR circuit includes sensing a frequency offset of the CDR circuit, and adjusting the phase step size of the CDR circuit based on the sensed frequency offset. The frequency offset may be sensed by sensing a signal level on an integration path of a loop filter of the CDR circuit. The phase step size of the CDR circuit may be adjusted by switching the CDR circuit between a first phase step size and a second phase step size using a modulator (e.g., a sigma-delta modulator).
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.