Synchronization and interprocessor communication in a low power LTE system architecture
US10085275B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Sep 9, 2016 |
| Grant date | Sep 25, 2018 |
| Priority date | — |
| Expiry date | Nov 17, 2036 |
Classification
- Technology area (CPC Y)Emerging Cross-Sectional Technologies
- CPC primaryY02D30/70
- WIPO fieldDigital communication
- WIPO sectorElectrical engineering
Abstract
This disclosure relates to synchronization and interprocessor communication techniques in an improved system architecture for a cellular modem. According to some embodiments, a wireless device may include a control module, a downlink module, and an uplink module. The control module may decode control information to determine whether uplink or downlink activities are scheduled. If any uplink or downlink activities are scheduled, the control module may activate one or both of the uplink module or the downlink module to perform the scheduled activities. If no downlink activities are scheduled, the downlink module may not be activated by the control module, and may remain asleep until a later time when downlink activities are scheduled. Likewise, if no uplink activities are scheduled, the uplink module may not be activated by the control module, and may remain asleep until a later time when uplink activities are scheduled.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.