Pixel structure, array substrate and display device
US10088723B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Jul 9, 2015 |
| Grant date | Oct 2, 2018 |
| Priority date | — |
| Expiry date | Dec 10, 2035 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10D30/6745
- WIPO fieldOptics
- WIPO sectorInstruments
Abstract
The present invention provides a pixel structure, comprising scan lines, data lines and pixel areas, and the scan lines are separately arranged in parallel along a horizontal direction, and the data lines are separately arranged in parallel along a vertical direction, and the scan lines and the data lines overlap with each other to form the pixel areas, and the pixel structure further comprises a connection electrode employed to coupled to pixel areas, and the connection electrode comprises a first connection layer and a second connection layer, and the first connection layer is in the same pattern layer with the scan lines and intersects with the scan lines, and the first connection layer at an intersecting position with the scan line is disconnected, and the second connection layer is in the same pattern layer with the data lines and crosses with the scan lines.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.