Array substrate, liquid crystal display panel and liquid crystal display device
US10088726B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Jul 13, 2016 |
| Grant date | Oct 2, 2018 |
| Priority date | — |
| Expiry date | Oct 17, 2036 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG02F2202/104
- WIPO fieldOptics
- WIPO sectorInstruments
Abstract
The array substrate, the liquid crystal display panel and the liquid crystal display device of the present disclosure are designed to from the MIS storage capacitor by the P—Si semiconductor layer, the first metal layer and the insulating layer between above or the P—Si semiconductor layer, the second metal layer and the dielectric spacer layer between above, when one side of the first metal layer or the second metal layer receiving the negative gray voltage, the P—Si in the P—Si semiconductor layer will gather to form the hole, when receiving the positive gray voltage, will form the depletion layer on the upper layer of the P—Si to reduce the capacity of the MIS storage capacitor, thereby reducing the difference of the capacitance when the MIS storage capacitor in the positive and negative gray voltage, improving the flicker phenomena and ensuring the display effect.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.