System and method for dual-region singulation
US10090215B2 · kind B2 · utility
0Cited by
1References
19Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Jan 11, 2017 |
| Grant date | Oct 2, 2018 |
| Priority date | — |
| Expiry date | Jan 11, 2037 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH01L2924/146
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
A semiconductor die includes a semiconductor circuit disposed within or over a substrate. A conductive contact pad is disposed over the substrate outside the semiconductor circuit. A floating electrical path ends at a singulated edge of the die. The electrical path is electrically coupled to the conductive contact pad.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.