Current reuse amplifier
US10090816B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Mar 29, 2017 |
| Grant date | Oct 2, 2018 |
| Priority date | — |
| Expiry date | Mar 29, 2037 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH03F2200/451
- WIPO fieldBasic communication processes
- WIPO sectorElectrical engineering
Abstract
A two-stage amplifier of a type of the current re-use configuration is disclosed. The amplifier includes first to third transistors, where the first transistor constitute the first stage, while, the latter two transistors constitute the second stance. The first to third transistors are connected in series between a power supply and ground such that a bias current supplied to the third transistor flows in the second and first transistors. The first transistor in the source thereof is grounded in the DC mode. The second transistor is grounded in the AC mode but floated in the DC mode. The third transistor that outputs an amplified signal is connected in parallel in the AC mode but in series in the DC mode with respect to the second transistor.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.