Apparatus and method for calibrating signal synchronization
US10095263B1 · kind B1 · utility
Assignee
Inventors
Key dates
| Filing date | Dec 7, 2016 |
| Grant date | Oct 9, 2018 |
| Priority date | — |
| Expiry date | Apr 6, 2037 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F3/0673
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
Aspects of the disclosure include a data storage controller that includes a main circuit, a synchronization circuit, and a detection circuit. The main circuit is configured to receive a test signal, generate a data signal based on the test signal, and generate a compensation signal based on the test signal and a phase shift selected from N predetermined phase shifts. N may be an integer greater than one. The synchronization circuit is configured to receive the data signal and the data compensation signal, and generate a delayed data signal and a latched compensation signal in response to the data signal. The detection circuit is configured to determine whether rising and falling edges of the latched compensation signal and corresponding rising and falling edges of the delayed data signal are synchronized.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.