Controllers including separate input-output circuits for mapping table and buffer memory, solid state drives including the controllers, and computing systems including the solid state drives
US10095411B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Sep 18, 2015 |
| Grant date | Oct 9, 2018 |
| Priority date | — |
| Expiry date | Dec 8, 2035 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F2212/7203
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
Solid state drives may include a controller, a mapping table and a buffer memory. The controller provides a logical address of associated data through a first input-output unit at a first speed and provides the associated data through a second input-output unit at a second speed. The controller may be connected to the first input-output unit and the second input-output unit. The mapping table may be connected to the controller through the first input-output unit. The buffer memory may be connected to the controller through the second input-output unit. The first input-output unit may be physically separated from the second input-output unit. The first speed may be different from the second speed.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.