Switching allocation of computer bus lanes
US10102074B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Dec 1, 2015 |
| Grant date | Oct 16, 2018 |
| Priority date | — |
| Expiry date | Jan 10, 2036 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F13/4022
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
The embodiments relate to dynamically allocating lanes of a computer bus. A computer system is configured with a plurality of connectors in communication with a module, with each connector configured to receive a respective adapter. The module detects a presence of each primary and backup adapter present, and controls an initial allocation of lanes to each detected primary adapter for maximizing adapter functionality. After the initial allocation and in response to detecting a failure of at least one primary adapter, the module dynamically switches lanes from the failed adapter to at least one of the one or more remaining primary adapters and the backup adapter.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.