Phased based distributed LRU for shared cache systems
US10102147B1 · kind B1 · utility
Assignee
Inventors
Key dates
| Filing date | Jun 21, 2016 |
| Grant date | Oct 16, 2018 |
| Priority date | — |
| Expiry date | May 2, 2037 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F2212/313
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
In a system in which a plurality of computing elements share a cache, each computing element owns a stripe of the cache. Each stripe contains cache objects that are accessible to all computing elements but managed only by the owning computing element. Each computing element maintains an LRU FIFO queue in local memory for the cache objects owned by that computing element. Each computing element also maintains a separate hash table in local memory for each other computing element. The hash tables indicate access to cache objects that are owned by those other computing elements. Each computing element updates its LRU FIFO queue when it accesses cache objects that it owns. The hash tables are periodically distributed by all computing elements via RDMA so that the LRU FIFO queues of all computing elements can be updated based on accesses to owned cache objects by other non-owner computing elements.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.