Methods of fabricating semiconductor devices
US10103030B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Dec 13, 2016 |
| Grant date | Oct 16, 2018 |
| Priority date | — |
| Expiry date | Dec 13, 2036 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10B12/34
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
A method of fabricating a semiconductor device includes sequentially forming a first insulation pattern and an etch stop pattern on a peripheral circuit area of a substrate, forming a first mask pattern on a cell array area of the substrate, the first mask pattern including a pair of first portions extending in parallel and a second portion covering a portion of a sidewall of the etch stop pattern and a portion of a sidewall of the first insulation pattern, forming a second insulation layer covering the etch stop pattern and the first mask pattern, partially etching the etch stop pattern and the second insulation layer to expose the second portion of the first mask pattern, and removing the second portion of the first mask pattern to divide the pair of first portions of the first mask pattern.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.