Circuit board with measure against high frequency noise
US10103112B2 · kind B2 · utility
Assignee
Inventor
Key dates
| Filing date | Apr 6, 2017 |
| Grant date | Oct 16, 2018 |
| Priority date | — |
| Expiry date | Apr 6, 2037 |
Classification
- Technology area (CPC Y)Emerging Cross-Sectional Technologies
- CPC primaryY02P70/50
- WIPO fieldElectrical machinery, apparatus, energy
- WIPO sectorElectrical engineering
Abstract
A circuit board with a measure against high frequency noise includes: an interconnect substrate having an interconnect pattern to which an IC which is a source of high frequency noise is electrically connected; a pair of lands provided on a mounting surface of the interconnect substrate; and a chip component having a body composed of a magnetic body (i.e., ferrite) in a rectangular parallelepiped, and a pair of external electrodes provided at opposite ends of the body, the pair of external electrodes being connected to the pair of lands, the body being disposed on the interconnect pattern, as observed in a direction perpendicular to the mounting surface.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.