Regulator circuit and method of operating regulator circuit
US10103617B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | May 9, 2017 |
| Grant date | Oct 16, 2018 |
| Priority date | — |
| Expiry date | May 9, 2037 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH02M1/0003
- WIPO fieldElectrical machinery, apparatus, energy
- WIPO sectorElectrical engineering
Abstract
A regulator circuit comprises: a regulator output node; at least (N+1) regulator control circuits, N being an integer greater than 1; N drivers, each one of the N drivers including: a multiplexer having an input port and an output port, the input port of the multiplexer being coupled with output nodes of the at least (N+1) regulator control circuits; an adjuster circuit configured to adjust a level of a current supplied by the driver to the regulator output node; and a task controller. The task controller is configured to: set a first one of the N+1 regulator control circuits to be idle during a first cycle of a clock signal; and set a second one of the N+1 regulator control circuits to be idle during a second cycle of the clock signal.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.