Method and system for performing division/multiplication operations in digital processors, corresponding device and computer program product
US10108396B2 · kind B2 · utility
Assignee
Inventor
Key dates
| Filing date | Jun 24, 2014 |
| Grant date | Oct 23, 2018 |
| Priority date | — |
| Expiry date | Jul 25, 2035 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F7/535
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A digital processor, such as, e.g., a divider in a PID controller, performs a mathematical operation such as division (or multiplication) involving operands represented by strings of bit signals and an operator to produce an operation result. The processor is configured by identifying first and second power-of-two approximating values of the operator as the nearest lower and nearest higher power-of-two values to the operator. The operation is performed on the input operands by means of the first and second power-of-two approximating values of the operator by shifting the bit signals in the operands by using the first and second power-of-two approximating values in an alternated sequence to produce: first approximate results by using the first power-of-two approximating value, second approximate results by using the second power-of-two approximating value. The average of the first and second approximate results is representative of the accurate result of the operation.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.