High-performance processor instruction tracing
US10108528B2 · kind B2 · utility
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16Claims
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Key dates
| Filing date | Aug 26, 2016 |
| Grant date | Oct 23, 2018 |
| Priority date | — |
| Expiry date | Aug 26, 2036 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F11/3636
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
High-performance tracing can be achieved for an input program having a plurality of instructions. Techniques such as executable instruction transcription can enable execution of a plurality of instructions at a time via a run buffer. Execution information can be extracted via run buffer execution. Fidelity of execution can be preserved by executing instructions on the target processor. Other features, such as an executable extraction instruction ensemble, branch interpretation, and relative address compensation can be implemented. High quality instruction tracing can thus be achieved without the usual performance penalties.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.