Method and apparatus for pre-fetching data in a system having a multi-level system memory
US10108549B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Sep 23, 2015 |
| Grant date | Oct 23, 2018 |
| Priority date | — |
| Expiry date | May 7, 2036 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F2212/6024
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A method is described that includes creating a first data pattern access record for a region of system memory in response to a cache miss at a host side cache for a first memory access request. The first memory access request specifies an address within the region of system memory. The method includes fetching a previously existing data access pattern record for the region from the system memory in response to the cache miss. The previously existing data access pattern record identifies blocks of data within the region that have been previously accessed. The method includes pre-fetching the blocks from the system memory and storing the blocks in the cache.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.