Level shifter for a wide low-voltage supply range
US10110231B1 · kind B1 · utility
Assignee
Inventor
Key dates
| Filing date | Jun 28, 2017 |
| Grant date | Oct 23, 2018 |
| Priority date | — |
| Expiry date | Jun 28, 2037 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH03K3/037
- WIPO fieldBasic communication processes
- WIPO sectorElectrical engineering
Abstract
A voltage translator translates an input signal to an output signal spanning a wide range of low voltages. An input buffer receives the input signal. A level shifter provides an output control signal. A gate control circuit provides gate control signals. An output buffer provides the output signal. The level shifter includes a pair of cross coupled P-type metal oxide silicon (PMOS) transistors each in series with an N-type metal oxide silicon (NMOS) transistor. A third NMOS transistor is coupled between an upper rail and a drain of one PMOS transistor; the gate of the third NMOS transistor is controlled by a first input control signal. A fourth NMOS transistor is coupled between the upper rail and a drain of the other PMOS transistor; the gate of the fourth NMOS transistor is controlled by a second input control signal.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.