Patent · US Active

Digital to analog converter (DAC) having sub-DACs with arrays of resistors

US10110244B1 · kind B1 · utility

3Cited by

8References

19Claims

0Family size

Assignee

NXP USA, Inc. · US

Inventors

Stefano Pietri · Austin, US
James R. Feddeler · Austin, US
Michael T. Berens · Austin, US
Yizhong Zhang · Suzhou, CN

Key dates

Filing date	Dec 7, 2017
Grant date	Oct 23, 2018
Priority date	—
Expiry date	Dec 7, 2037

Classification

Technology area (CPC H)Electricity
CPC primaryH03M1/808
WIPO fieldBasic communication processes
WIPO sectorElectrical engineering

Abstract

A digital to analog converter (DAC) includes a first sub-DAC configured to convert most significant bits (MSBs) of digital input data, the first sub-DAC including a first array of resistors, a second sub-DAC configured to convert at least some least significant bits (LSBs) of the digital input data, the second sub-DAC including a second array of resistors, and a first scaling resistor connected between the first and second sub-DACs, wherein the first scaling resistor has a resistance value that is based on the number of resistors in the second sub-DAC.

Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.