Shift register unit and driving method thereof, gate driving circuit and display device
US10115335B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | May 19, 2016 |
| Grant date | Oct 30, 2018 |
| Priority date | — |
| Expiry date | May 19, 2036 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG09G2320/02
- WIPO fieldAudio-visual technology
- WIPO sectorElectrical engineering
Abstract
The present disclosure relates to a shift register unit and driving method thereof, a gate driving circuit and a display device. The shift register unit comprises: an input module for controlling a level of a first node based on a scan pulse, an output module for controlling a scan pulse output based on the level of the first node, a reset module for resetting the first node and the scan pulse output, and a control module for generating a reset trigger signal, wherein the reset module further resets the first node based on the reset trigger signal. The shift register units can be cascaded to form a gate driving circuit to realize output of multiple scan pulses. By integrating such a gate driving circuit on the array substrate, area of the bezel region of the array substrate can be reduced, thereby facilitating bezel narrowing of a display device. At the same time, due to presence of the control module, the reset module is enabled to reset the first node more stably while normal output of the scan pulse is maintained.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.