Method of manufacturing integrated circuit device
US10115640B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Mar 16, 2017 |
| Grant date | Oct 30, 2018 |
| Priority date | — |
| Expiry date | Mar 16, 2037 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10D84/0158
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
A method of manufacturing an integrated circuit device includes providing a substrate with a pattern structure, the pattern structure including a plurality of first patterns that extend in a first direction, are parallel to one another, and are separated from one another with a space therebetween. At least one support structure that contacts an upper surface of the pattern structure and extends on the pattern structure in a second direction that crosses the first direction is formed. A buried layer that fills the spaces between the plurality of first patterns while the at least one support structure contacts the upper surface of the pattern structure is formed. The at least one support structure is separated from the pattern structure.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.