Isolation structure for reducing crosstalk between pixels and fabrication method thereof
US10115758B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Mar 8, 2017 |
| Grant date | Oct 30, 2018 |
| Priority date | — |
| Expiry date | Mar 8, 2037 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10F39/8053
Abstract
A semiconductor device and a method for fabricating the same are provided. In the method for fabricating the semiconductor device, at first, a semiconductor substrate is provided. Then, a trench is formed in the semiconductor substrate. Thereafter, a dielectric layer is formed to cover the semiconductor substrate, in which the dielectric layer has a trench portion located in the trench of the semiconductor substrate. Then, a reflective material layer is formed on the trench portion of the dielectric layer. Thereafter, the reflective material layer is etched to form an isolation structure, in which the isolation structure includes a top portion located on the semiconductor substrate and a bottom portion located in a trench formed by the trench portion of the dielectric layer.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.