Patent · US Active

Method for manufacturing semiconductor device

US10115804B2 · kind B2 · utility

1Cited by
0References
10Claims
0Family size

Assignee

Inventors

Key dates

Filing dateApr 28, 2015
Grant dateOct 30, 2018
Priority date
Expiry dateMay 6, 2035

Classification

  • Technology area (CPC H)Electricity
  • CPC primaryH10D30/601
  • WIPO fieldSemiconductors
  • WIPO sectorElectrical engineering

Abstract

A method for manufacturing a semiconductor device, comprising: forming a gate trench on a substrate; forming a gate dielectric layer and a metal gate layer thereon in the gate trench; forming a first tungsten (W) layer on a surface of the metal gate layer, and forming a tungsten nitride (WN) blocking layer by injecting nitrogen (N) ions; and filling with W through an atomic layer deposition (ALD) process. The blocking layer prevents ions in the precursors from aggregating on an interface and penetrating into the metal gate layer and the gate dielectric layer. At the same time, adhesion of W is enhanced, a process window of W during planarization is increased, reliability of the device is improved and the gate resistance is further reduced.

Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.