Multi-mode frequency divider
US10116314B1 · kind B1 · utility
Assignee
Inventors
Key dates
| Filing date | Nov 1, 2017 |
| Grant date | Oct 30, 2018 |
| Priority date | — |
| Expiry date | Nov 1, 2037 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH03L7/18
- WIPO fieldBasic communication processes
- WIPO sectorElectrical engineering
Abstract
A frequency divider includes first circuitry, second circuitry, and third circuitry. The first circuitry includes divide-by-two (div2) frequency divider circuitry, and the second circuitry includes additional circuitry for a divide-by-three (div3) frequency divider. The second circuitry is selectively enabled using a control signal and can receive signals from the first circuitry when enabled. Specifically, the second circuitry is enabled in the div3 mode but is not enabled in the div2 mode. The third circuitry receives signals from the first circuitry and also receives signals from the second circuitry when the second circuitry is enabled. The first circuitry and the third circuitry function as a div2 frequency divider when the second circuitry is not enabled. The first circuitry, the second circuitry, and the third circuitry function as a div3 frequency divider when the second circuitry is enabled.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.