Echo cancellation for high speed full duplex data transmissions
US10116428B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | May 20, 2014 |
| Grant date | Oct 30, 2018 |
| Priority date | — |
| Expiry date | Sep 10, 2034 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH04B3/30
- WIPO fieldTelecommunications
- WIPO sectorElectrical engineering
Abstract
Systems, devices and methods for analog echo cancellation for high speed full duplex data transmissions, which include a first set of differential nodes to receive reception data and transmission data, a second set of differential nodes to receive the transmission data, and a subtraction circuit to receive data from the first set of differential nodes and data from the second set of differential nodes. The subtraction circuit includes a plurality of capacitors to receive data from each of the first and second sets differential nodes, and a termination circuit for providing DC termination voltage to subtract the data of the second set of differential nodes from the data of the first set of differential nodes to eliminate echo from the reception data received at the first set differential nodes.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.