Preparation method for thin film transistor, preparation method for array substrate, array substrate, and display apparatus
US10120256B2 · kind B2 · utility
Assignees
Inventors
Key dates
| Filing date | Dec 31, 2015 |
| Grant date | Nov 6, 2018 |
| Priority date | — |
| Expiry date | Dec 31, 2035 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10K59/1213
- WIPO fieldOptics
- WIPO sectorInstruments
Abstract
Preparation method for a thin film transistor, preparation method for an array substrate, an array substrate, and a display apparatus are provided. The preparation method for a thin film transistor includes: forming, on a pattern of a semiconductor layer, a first photoresist pattern including a photoresist with two different thicknesses, and performing a heavily-doped ion implantation process on the pattern of the semiconductor layer by using the first photoresist pattern as a barrier mask; ashing the first photoresist pattern to remove the photoresist with a second thickness and to thin the photoresist with a first thickness, so as to form a second photoresist pattern; and performing a lightly-doped ion implantation process on the pattern of the semiconductor layer by using the second photoresist pattern as a barrier mask.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.