Ferroelectric memory expansion for firmware updates
US10120674B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Apr 27, 2016 |
| Grant date | Nov 6, 2018 |
| Priority date | — |
| Expiry date | Jun 20, 2036 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG11C11/2253
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
An integrated circuit including a ferroelectric random access memory (FRAM) for storing firmware, and a method of updating that firmware. The FRAM is constructed to selectively operate as a 2T2C FRAM memory in a normal operating mode, and as a 1T1C FRAM memory in an update mode. Updating of the stored firmware is performed by placing the FRAM in its update (1T1C) mode and writing the updated code into alternate rows of the 1T1C half-cells at each of a plurality of memory locations, while the other 1T1C half-cells in the other alternate rows retain the original data. Following verification of the updated contents, the original data in the other half-cells are overwritten with the verified updated data, and the operating mode is changed back to the normal (2T2C) operating mode.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.