Patent · US Active

Bus device with programmable address

US10120829B2 · kind B2 · utility

4Cited by
6References
24Claims
0Family size

Assignee

Inventors

Key dates

Filing dateNov 23, 2016
Grant dateNov 6, 2018
Priority date
Expiry dateMay 12, 2037

Classification

  • Technology area (CPC G)Physics
  • CPC primaryG06F13/4282
  • WIPO fieldComputer technology
  • WIPO sectorElectrical engineering

Abstract

An embodiment bus device with a programmable address includes a bus communication circuit connected to a bus terminal, a first pin terminal, a memory having a first register with a first address stored therein and a second register, and a state logic circuit. The state logic circuit detects a chip select signal on the first pin terminal, receives a first message through the bus communication circuit while the chip select signal is asserted, determines that the first message indicates an address set command, and saves an address value in the first message as a second address in the second register in response to a target address in the first message matching the first address. The state logic circuit further processes a second message received through the bus communication circuit in response to a target address of the second message matching the second address.

Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.